Ghizlane Lhairech-Lebreton, Philippe Coussy, Eric Martin. Hierarchical and Multiple-Clock Domain High-Level Synthesis for Low-Power Design on FPGA. In International Conference on Field Programmable Logic and Applications, FPL 2010, August 31 2010 - September 2, 2010, Milano, Italy. pages 464-468, IEEE, 2010. [doi]
@inproceedings{Lhairech-LebretonCM10,
title = {Hierarchical and Multiple-Clock Domain High-Level Synthesis for Low-Power Design on FPGA},
author = {Ghizlane Lhairech-Lebreton and Philippe Coussy and Eric Martin},
year = {2010},
doi = {10.1109/FPL.2010.94},
url = {http://dx.doi.org/10.1109/FPL.2010.94},
tags = {design},
researchr = {https://researchr.org/publication/Lhairech-LebretonCM10},
cites = {0},
citedby = {0},
pages = {464-468},
booktitle = {International Conference on Field Programmable Logic and Applications, FPL 2010, August 31 2010 - September 2, 2010, Milano, Italy},
publisher = {IEEE},
}