Multivalued Logic for Reduced Pin Count and Multi-site SoC Testing

Baohu Li, Vishwani D. Agrawal. Multivalued Logic for Reduced Pin Count and Multi-site SoC Testing. In 24th IEEE North Atlantic Test Workshop, NATW 2015, Johnson City, NY, USA, May 11-13, 2015. pages 49-54, IEEE, 2015. [doi]

Abstract

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