Wuxi Li, Shounak Dhar, David Z. Pan. UTPlaceF: A Routability-Driven FPGA Placer With Physical and Congestion Aware Packing. IEEE Trans. on CAD of Integrated Circuits and Systems, 37(4):869-882, 2018. [doi]
@article{LiDP18,
title = {UTPlaceF: A Routability-Driven FPGA Placer With Physical and Congestion Aware Packing},
author = {Wuxi Li and Shounak Dhar and David Z. Pan},
year = {2018},
doi = {10.1109/TCAD.2017.2729349},
url = {https://doi.org/10.1109/TCAD.2017.2729349},
researchr = {https://researchr.org/publication/LiDP18},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {37},
number = {4},
pages = {869-882},
}