Low Power Placement and Routing for the Coarse-Grained Power Gating FPGA Architecture

Ce Li, Yiping Dong, Takahiro Watanabe. Low Power Placement and Routing for the Coarse-Grained Power Gating FPGA Architecture. IEICE Transactions, 94-A(12):2519-2527, 2011. [doi]

@article{LiDW11-4,
  title = {Low Power Placement and Routing for the Coarse-Grained Power Gating FPGA Architecture},
  author = {Ce Li and Yiping Dong and Takahiro Watanabe},
  year = {2011},
  url = {http://search.ieice.org/bin/summary.php?id=e94-a_12_2519},
  researchr = {https://researchr.org/publication/LiDW11-4},
  cites = {0},
  citedby = {0},
  journal = {IEICE Transactions},
  volume = {94-A},
  number = {12},
  pages = {2519-2527},
}