Weifu Li, Paul Franzon. Hardware implementation of Hierarchical Temporal Memory algorithm. In Karan S. Bhatia, Massimo Alioto, Danella Zhao, Andrew Marshall, Ramalingam Sridhar, editors, 29th IEEE International System-on-Chip Conference, SOCC 2016, Seattle, WA, USA, September 6-9, 2016. pages 133-138, IEEE, 2016. [doi]
@inproceedings{LiF16-18, title = {Hardware implementation of Hierarchical Temporal Memory algorithm}, author = {Weifu Li and Paul Franzon}, year = {2016}, doi = {10.1109/SOCC.2016.7905453}, url = {http://dx.doi.org/10.1109/SOCC.2016.7905453}, researchr = {https://researchr.org/publication/LiF16-18}, cites = {0}, citedby = {0}, pages = {133-138}, booktitle = {29th IEEE International System-on-Chip Conference, SOCC 2016, Seattle, WA, USA, September 6-9, 2016}, editor = {Karan S. Bhatia and Massimo Alioto and Danella Zhao and Andrew Marshall and Ramalingam Sridhar}, publisher = {IEEE}, isbn = {978-1-5090-1367-8}, }