Walter Yuan-Hwa Li, Chin-Ling Huang, Chung-Ping Chung. Tolerating Load Miss-Latency by Extending Effective Instruction Window with Low Complexity. In Guang R. Gao, Yu-Chee Tseng, editors, International Conference on Parallel Processing, ICPP 2011, Taipei, Taiwan, September 13-16, 2011. pages 83-92, IEEE, 2011. [doi]
Abstract is missing.