Liang-Che Li, Wen-Hsuan Hsu, Kuen-Jong Lee, Chun-Lung Hsu. An efficient 3D-IC on-chip test framework to embed TSV testing in memory BIST. In The 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, Japan, January 19-22, 2015. pages 520-525, IEEE, 2015. [doi]
Abstract is missing.