A time-multiplexed FPGA overlay with linear interconnect

Xiangwei Li, Abhishek Kumar Jain, Douglas L. Maskell, Suhaib A. Fahmy. A time-multiplexed FPGA overlay with linear interconnect. In 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018. pages 1075-1080, IEEE, 2018. [doi]

@inproceedings{LiJMF18,
  title = {A time-multiplexed FPGA overlay with linear interconnect},
  author = {Xiangwei Li and Abhishek Kumar Jain and Douglas L. Maskell and Suhaib A. Fahmy},
  year = {2018},
  doi = {https://doi.org/10.23919/DATE.2018.8342171},
  researchr = {https://researchr.org/publication/LiJMF18},
  cites = {0},
  citedby = {0},
  pages = {1075-1080},
  booktitle = {2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018},
  publisher = {IEEE},
  isbn = {978-3-9819263-0-9},
}