An 8-Bit 2.1-mW 350-MS/s SAR ADC With 1.5 b/cycle Redundancy in 65-nm CMOS

Dengquan Li, Maliang Liu, Lei Zhao, Henghui Mao, Ruixue Ding, Zhangming Zhu. An 8-Bit 2.1-mW 350-MS/s SAR ADC With 1.5 b/cycle Redundancy in 65-nm CMOS. IEEE Trans. on Circuits and Systems, 67-II(11):2307-2311, 2020. [doi]

Authors

Dengquan Li

This author has not been identified. Look up 'Dengquan Li' in Google

Maliang Liu

This author has not been identified. Look up 'Maliang Liu' in Google

Lei Zhao

This author has not been identified. Look up 'Lei Zhao' in Google

Henghui Mao

This author has not been identified. Look up 'Henghui Mao' in Google

Ruixue Ding

This author has not been identified. Look up 'Ruixue Ding' in Google

Zhangming Zhu

This author has not been identified. Look up 'Zhangming Zhu' in Google