High Parallel VLSI Architecture Design of BPC in JPEG2000

Lintao Li, Jiangyi Shi, Zhixiong Di. High Parallel VLSI Architecture Design of BPC in JPEG2000. In 13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019. pages 1-4, IEEE, 2019. [doi]

@inproceedings{LiSD19,
  title = {High Parallel VLSI Architecture Design of BPC in JPEG2000},
  author = {Lintao Li and Jiangyi Shi and Zhixiong Di},
  year = {2019},
  doi = {10.1109/ASICON47005.2019.8983455},
  url = {https://doi.org/10.1109/ASICON47005.2019.8983455},
  researchr = {https://researchr.org/publication/LiSD19},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019},
  publisher = {IEEE},
  isbn = {978-1-7281-0735-6},
}