Design of a low power GPS receiver in 0.18 µm CMOS technology with a SigmaDeltafractional-N synthesizer

Di Li, Yin-tang Yang, Jiang-an Wang, Bing Li, Qiang Long, Jary Wei, Nai-di Wang, Lei Wang, Qian-kun Liu, Da-long Zhang. Design of a low power GPS receiver in 0.18 µm CMOS technology with a SigmaDeltafractional-N synthesizer. Journal of Zhejiang University - Science C, 11(6):444-449, 2010. [doi]

Abstract

Abstract is missing.