A 1.5-bit/stage pipeline ADC with FFT-based calibration method

Ming-Chun Liang, Cheng-Han Hsieh, Shuenn-Yuh Lee. A 1.5-bit/stage pipeline ADC with FFT-based calibration method. In 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013. pages 2042-2045, IEEE, 2013. [doi]

@inproceedings{LiangHL13,
  title = {A 1.5-bit/stage pipeline ADC with FFT-based calibration method},
  author = {Ming-Chun Liang and Cheng-Han Hsieh and Shuenn-Yuh Lee},
  year = {2013},
  doi = {10.1109/ISCAS.2013.6572273},
  url = {http://dx.doi.org/10.1109/ISCAS.2013.6572273},
  researchr = {https://researchr.org/publication/LiangHL13},
  cites = {0},
  citedby = {0},
  pages = {2042-2045},
  booktitle = {2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013},
  publisher = {IEEE},
  isbn = {978-1-4673-5760-9},
}