On-Chip Measurement of Clock and Data Jitter With Sub-Picosecond Accuracy for 10 Gb/s Multilane CDRs

Joshua Liang, Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura. On-Chip Measurement of Clock and Data Jitter With Sub-Picosecond Accuracy for 10 Gb/s Multilane CDRs. J. Solid-State Circuits, 50(4):845-855, 2015. [doi]

@article{LiangJSKT15,
  title = {On-Chip Measurement of Clock and Data Jitter With Sub-Picosecond Accuracy for 10 Gb/s Multilane CDRs},
  author = {Joshua Liang and Mohammad Sadegh Jalali and Ali Sheikholeslami and Masaya Kibune and Hirotaka Tamura},
  year = {2015},
  doi = {10.1109/JSSC.2014.2378280},
  url = {http://dx.doi.org/10.1109/JSSC.2014.2378280},
  researchr = {https://researchr.org/publication/LiangJSKT15},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {50},
  number = {4},
  pages = {845-855},
}