A high speed pipelined analog-to-digital converter using modified time-shifted correlated double sampling technique

Jin-Fu Lin, Soon-Jyh Chang. A high speed pipelined analog-to-digital converter using modified time-shifted correlated double sampling technique. In International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece. IEEE, 2006. [doi]

Authors

Jin-Fu Lin

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Soon-Jyh Chang

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