A 6.4G LLR/s 8×8 64-QAM soft-output MIMO detector with lattice reduction preprocessing

Jing-You Lin, Jung-Chun Chi, Chun-Fu Liao, Yuan-Hao Huang. A 6.4G LLR/s 8×8 64-QAM soft-output MIMO detector with lattice reduction preprocessing. In 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, April 24-27, 2017. pages 1-4, IEEE, 2017. [doi]

@inproceedings{LinCLH17,
  title = {A 6.4G LLR/s 8×8 64-QAM soft-output MIMO detector with lattice reduction preprocessing},
  author = {Jing-You Lin and Jung-Chun Chi and Chun-Fu Liao and Yuan-Hao Huang},
  year = {2017},
  doi = {10.1109/VLSI-DAT.2017.7939685},
  url = {https://doi.org/10.1109/VLSI-DAT.2017.7939685},
  researchr = {https://researchr.org/publication/LinCLH17},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, April 24-27, 2017},
  publisher = {IEEE},
  isbn = {978-1-5090-3969-2},
}