A 6.4G LLR/s 8×8 64-QAM soft-output MIMO detector with lattice reduction preprocessing

Jing-You Lin, Jung-Chun Chi, Chun-Fu Liao, Yuan-Hao Huang. A 6.4G LLR/s 8×8 64-QAM soft-output MIMO detector with lattice reduction preprocessing. In 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, April 24-27, 2017. pages 1-4, IEEE, 2017. [doi]

Abstract

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