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Jyi-Tsong Lin, Hsuan-Hsu Chen, Kuan-Yu Lu, Chih-Hung Sun, Tung-Yen Lai, Fu-Liang Yang. A unipolar-CMOS with recessed source/drain load. In 2011 IEEE 9th International Conference on ASIC, ASICON 2011, Xiamen, China, October 25-28, 2011. pages 543-546, IEEE, 2011. [doi]

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Channel Stress Engineering Through Source/Drain Recess Optimization and Its Process Variation Study for 5 nm-node FinFETsDawei Wang, Tao Liu, Xin Sun, Kun Chen, Jingwen Yang, Chunlei Wu, Min Xu, David Wei Zhang. asicon 2021: 1-4 [doi]

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