Technology mapping of LUT based FPGAs for delay optimisation - researchr publication authors

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Xiaochun Lin, Erik L. Dagless, Aiguo Lu. Technology mapping of LUT based FPGAs for delay optimisation. In Wayne Luk, Peter Y. K. Cheung, Manfred Glesner, editors, Field-Programmable Logic and Applications, 7th International Workshop, FPL 97, London, UK, September 1-3, 1997, Proceedings. Volume 1304 of Lecture Notes in Computer Science, pages 245-254, Springer, 1997.

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