Technology mapping of LUT based FPGAs for delay optimisation

Xiaochun Lin, Erik L. Dagless, Aiguo Lu. Technology mapping of LUT based FPGAs for delay optimisation. In Wayne Luk, Peter Y. K. Cheung, Manfred Glesner, editors, Field-Programmable Logic and Applications, 7th International Workshop, FPL 97, London, UK, September 1-3, 1997, Proceedings. Volume 1304 of Lecture Notes in Computer Science, pages 245-254, Springer, 1997.

Abstract

Abstract is missing.