A 5Gb/s pulse signaling interface for low power on-chip data communication

Hung-Wen Lin, Ying-Chieh Ho, YingLin Fa, Chauchin Su. A 5Gb/s pulse signaling interface for low power on-chip data communication. In International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France. pages 201-204, IEEE, 2010. [doi]

Authors

Hung-Wen Lin

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Ying-Chieh Ho

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YingLin Fa

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Chauchin Su

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