A scalable parallel hardware architecture for connected component labeling

Chung-Yuan Lin, Sz-Yan Li, Tsung-Han Tsai. A scalable parallel hardware architecture for connected component labeling. In Proceedings of the International Conference on Image Processing, ICIP 2010, September 26-29, Hong Kong, China. pages 3753-3756, IEEE, 2010. [doi]

Abstract

Abstract is missing.