You-Sheng Lin, Miao-Shan Li, Ching-Yuan Yang. A 2.7-Gb/s Clock and Data Recovery Circuit Based on D/PLL. In Proceedings of the ACM Symposium on Cloud Computing, SoCC 2019, Santa Cruz, CA, USA, November 20-23, 2019. pages 284-288, ACM, 2019. [doi]
@inproceedings{LinLY19-4,
title = {A 2.7-Gb/s Clock and Data Recovery Circuit Based on D/PLL},
author = {You-Sheng Lin and Miao-Shan Li and Ching-Yuan Yang},
year = {2019},
doi = {10.1109/SOCC46988.2019.1570548362},
url = {https://doi.org/10.1109/SOCC46988.2019.1570548362},
researchr = {https://researchr.org/publication/LinLY19-4},
cites = {0},
citedby = {0},
pages = {284-288},
booktitle = {Proceedings of the ACM Symposium on Cloud Computing, SoCC 2019, Santa Cruz, CA, USA, November 20-23, 2019},
publisher = {ACM},
isbn = {978-1-4503-6973-2},
}