A 0.55 V 7-bit 160 MS/s interpolated pipeline ADC using dynamic amplifiers - researchr publication authors

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James Lin, Daehwa Paik, Seungjong Lee, Masaya Miyahara, Akira Matsuzawa. A 0.55 V 7-bit 160 MS/s interpolated pipeline ADC using dynamic amplifiers. In Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, San Jose, CA, USA, September 22-25, 2013. pages 1-4, IEEE, 2013. [doi]

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