An Area Efficient Radix-4 Reciprocal Dual Trellis Architecture for a High-Code-Rate Turbo Decoder

Chen-Yang Lin, Cheng-Chi Wong, Hsie-Chia Chang. An Area Efficient Radix-4 Reciprocal Dual Trellis Architecture for a High-Code-Rate Turbo Decoder. IEEE Trans. on Circuits and Systems, 62-II(1):65-69, 2015. [doi]

Abstract

Abstract is missing.