A Pipeline Replica Bitline Technique for Suppressing Timing Variation of SRAM Sense Amplifiers in a 28-nm CMOS Process

Zhiting Lin, Xiulong Wu, Zhi Li, Lijun Guan, Chunyu Peng, Changyong Liu, Junning Chen. A Pipeline Replica Bitline Technique for Suppressing Timing Variation of SRAM Sense Amplifiers in a 28-nm CMOS Process. J. Solid-State Circuits, 52(3):669-677, 2017. [doi]

Authors

Zhiting Lin

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Xiulong Wu

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Zhi Li

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Lijun Guan

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Chunyu Peng

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Changyong Liu

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Junning Chen

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