Xue Lin, Yanzhi Wang, Massoud Pedram. Stack sizing analysis and optimization for FinFET logic cells and circuits operating in the sub/near-threshold regime. In Fifteenth International Symposium on Quality Electronic Design, ISQED 2014, Santa Clara, CA, USA, March 3-5, 2014. pages 341-348, IEEE, 2014. [doi]
@inproceedings{LinWP14,
title = {Stack sizing analysis and optimization for FinFET logic cells and circuits operating in the sub/near-threshold regime},
author = {Xue Lin and Yanzhi Wang and Massoud Pedram},
year = {2014},
doi = {10.1109/ISQED.2014.6783346},
url = {http://dx.doi.org/10.1109/ISQED.2014.6783346},
researchr = {https://researchr.org/publication/LinWP14},
cites = {0},
citedby = {0},
pages = {341-348},
booktitle = {Fifteenth International Symposium on Quality Electronic Design, ISQED 2014, Santa Clara, CA, USA, March 3-5, 2014},
publisher = {IEEE},
}