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Chun-Yuan Lin, Huang-Ting Yen, Che-Lun Hung. Compressing three-dimensional sparse arrays using inter- and intra-task parallelization strategies on Intel Xeon and Xeon Phi. The Journal of Supercomputing, 73(8):3391-3410, 2017. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Efficient Strategies of Compressing Three-Dimensional Sparse Arrays Based on Intel XEON and Intel XEON Phi EnvironmentsChun-Yuan Lin, Huang-Ting Yen, Che-Lun Hung. IEEEcit 2015: 1383-1388 [doi]
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