Ye-Jyun Lin, Chia-Lin Yang, Hsiang-Pang Li, Cheng-Yuan Michael Wang. A buffer cache architecture for smartphones with hybrid DRAM/PCM memory. In IEEE Non-Volatile Memory System and Applications Symposium, NVMSA 2015, Hong Kong, China, August 19-21, 2015. pages 1-6, IEEE, 2015. [doi]
@inproceedings{LinYLW15,
title = {A buffer cache architecture for smartphones with hybrid DRAM/PCM memory},
author = {Ye-Jyun Lin and Chia-Lin Yang and Hsiang-Pang Li and Cheng-Yuan Michael Wang},
year = {2015},
doi = {10.1109/NVMSA.2015.7304363},
url = {http://dx.doi.org/10.1109/NVMSA.2015.7304363},
researchr = {https://researchr.org/publication/LinYLW15},
cites = {0},
citedby = {0},
pages = {1-6},
booktitle = {IEEE Non-Volatile Memory System and Applications Symposium, NVMSA 2015, Hong Kong, China, August 19-21, 2015},
publisher = {IEEE},
isbn = {978-1-4673-6688-5},
}