Ye-Jyun Lin, Chia-Lin Yang, Hsiang-Pang Li, Cheng-Yuan Michael Wang. A Hybrid DRAM/PCM Buffer Cache Architecture for Smartphones with QoS Consideration. ACM Trans. Design Autom. Electr. Syst., 22(2), 2017. [doi]
@article{LinYLW17,
title = {A Hybrid DRAM/PCM Buffer Cache Architecture for Smartphones with QoS Consideration},
author = {Ye-Jyun Lin and Chia-Lin Yang and Hsiang-Pang Li and Cheng-Yuan Michael Wang},
year = {2017},
doi = {10.1145/2979143},
url = {http://doi.acm.org/10.1145/2979143},
researchr = {https://researchr.org/publication/LinYLW17},
cites = {0},
citedby = {0},
journal = {ACM Trans. Design Autom. Electr. Syst.},
volume = {22},
number = {2},
}