VSTA: A Prolog-Based Formal Verifier for Systolic Array Designs - researchr publication bibtex

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Nam Ling, Timothy K. Shih. VSTA: A Prolog-Based Formal Verifier for Systolic Array Designs. In ICPP. pages 73-81, 1993.

@inproceedings{LingS93:0,
  title = {VSTA: A Prolog-Based Formal Verifier for Systolic Array Designs},
  author = {Nam Ling and Timothy K. Shih},
  year = {1993},
  tags = {Prolog, rule-based},
  researchr = {https://researchr.org/publication/LingS93%3A0},
  cites = {0},
  citedby = {0},
  pages = {73-81},
  booktitle = {ICPP},
}

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