FPGA Logic Synthesis Using Quantified Boolean Satisfiability

Andrew C. Ling, Deshanand P. Singh, Stephen Dean Brown. FPGA Logic Synthesis Using Quantified Boolean Satisfiability. In Fahiem Bacchus, Toby Walsh, editors, Theory and Applications of Satisfiability Testing, 8th International Conference, SAT 2005, St. Andrews, UK, June 19-23, 2005, Proceedings. Volume 3569 of Lecture Notes in Computer Science, pages 444-450, Springer, 2005. [doi]

@inproceedings{LingSB05:0,
  title = {FPGA Logic Synthesis Using Quantified Boolean Satisfiability},
  author = {Andrew C. Ling and Deshanand P. Singh and Stephen Dean Brown},
  year = {2005},
  doi = {10.1007/11499107_37},
  url = {http://dx.doi.org/10.1007/11499107_37},
  tags = {C++, logic},
  researchr = {https://researchr.org/publication/LingSB05%3A0},
  cites = {0},
  citedby = {0},
  pages = {444-450},
  booktitle = {Theory and Applications of Satisfiability Testing, 8th International Conference, SAT 2005, St. Andrews, UK, June 19-23, 2005, Proceedings},
  editor = {Fahiem Bacchus and Toby Walsh},
  volume = {3569},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {3-540-26276-8},
}