Nusrat Jahan Lisa, Hafiz Md. Hasan Babu. Design of a Compact Ternary Parallel Adder/Subtractor Circuit in Quantum Computing. In 2015 IEEE International Symposium on Multiple-Valued Logic, Waterloo, ON, Canada, May 18-20, 2015. pages 36-41, IEEE, 2015. [doi]
@inproceedings{LisaB15-1,
title = {Design of a Compact Ternary Parallel Adder/Subtractor Circuit in Quantum Computing},
author = {Nusrat Jahan Lisa and Hafiz Md. Hasan Babu},
year = {2015},
doi = {10.1109/ISMVL.2015.23},
url = {http://dx.doi.org/10.1109/ISMVL.2015.23},
researchr = {https://researchr.org/publication/LisaB15-1},
cites = {0},
citedby = {0},
pages = {36-41},
booktitle = {2015 IEEE International Symposium on Multiple-Valued Logic, Waterloo, ON, Canada, May 18-20, 2015},
publisher = {IEEE},
isbn = {978-1-4799-1777-8},
}