Nusrat Jahan Lisa, Hafiz Md. Hasan Babu. Design of a Compact Ternary Parallel Adder/Subtractor Circuit in Quantum Computing. In 2015 IEEE International Symposium on Multiple-Valued Logic, Waterloo, ON, Canada, May 18-20, 2015. pages 36-41, IEEE, 2015. [doi]
No references recorded for this publication.
No citations of this publication recorded.