Intel LVS logic as a combinational logic paradigm in CNT technology

Bao Liu, Zhen Cao, Jun Tao, Xuan Zeng, PuShan Tang, H.-S. Philip Wong. Intel LVS logic as a combinational logic paradigm in CNT technology. In Shamik Das, Iris Bahar, Michael T. Niemier, editors, 2010 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2010, Anaheim, CA, USA, June 17-18, 2010. pages 77-81, IEEE Computer Society, 2010. [doi]

Authors

Bao Liu

This author has not been identified. Look up 'Bao Liu' in Google

Zhen Cao

This author has not been identified. Look up 'Zhen Cao' in Google

Jun Tao

This author has not been identified. Look up 'Jun Tao' in Google

Xuan Zeng

This author has not been identified. Look up 'Xuan Zeng' in Google

PuShan Tang

This author has not been identified. Look up 'PuShan Tang' in Google

H.-S. Philip Wong

This author has not been identified. Look up 'H.-S. Philip Wong' in Google