Bao Liu, Zhen Cao, Jun Tao, Xuan Zeng, PuShan Tang, H.-S. Philip Wong. Intel LVS logic as a combinational logic paradigm in CNT technology. In Shamik Das, Iris Bahar, Michael T. Niemier, editors, 2010 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2010, Anaheim, CA, USA, June 17-18, 2010. pages 77-81, IEEE Computer Society, 2010. [doi]
@inproceedings{LiuCTZTW10,
title = {Intel LVS logic as a combinational logic paradigm in CNT technology},
author = {Bao Liu and Zhen Cao and Jun Tao and Xuan Zeng and PuShan Tang and H.-S. Philip Wong},
year = {2010},
url = {http://dl.acm.org/citation.cfm?id=1835979},
researchr = {https://researchr.org/publication/LiuCTZTW10},
cites = {0},
citedby = {0},
pages = {77-81},
booktitle = {2010 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2010, Anaheim, CA, USA, June 17-18, 2010},
editor = {Shamik Das and Iris Bahar and Michael T. Niemier},
publisher = {IEEE Computer Society},
isbn = {978-1-4244-8020-3},
}