Front-end layout reflection for test chip design

Zeye Dexter Liu, Phillip Fynan, Ronald D. Blanton. Front-end layout reflection for test chip design. In IEEE International Test Conference, ITC 2017, Fort Worth, TX, USA, October 31 - Nov. 2, 2017. pages 1-10, IEEE, 2017. [doi]

@inproceedings{LiuFB17-1,
  title = {Front-end layout reflection for test chip design},
  author = {Zeye Dexter Liu and Phillip Fynan and Ronald D. Blanton},
  year = {2017},
  doi = {10.1109/TEST.2017.8242041},
  url = {https://doi.org/10.1109/TEST.2017.8242041},
  researchr = {https://researchr.org/publication/LiuFB17-1},
  cites = {0},
  citedby = {0},
  pages = {1-10},
  booktitle = {IEEE International Test Conference, ITC 2017, Fort Worth, TX, USA, October 31 - Nov. 2, 2017},
  publisher = {IEEE},
  isbn = {978-1-5386-3413-4},
}