TERA: A FPGA-based trace-driven emulation framework for designing on-chip communication architectures

Dan Liu 0003, Yi Feng, Jingjin Zhou, Dong Tong, Xu Cheng, Keyi Wang. TERA: A FPGA-based trace-driven emulation framework for designing on-chip communication architectures. In Thomas Büchner, Ramalingam Sridhar, Andrew Marshall, Norbert Schuhmann, editors, Annual IEEE International SoC Conference, SoCC 2010, September 27-29, 2010, Las Vegas, NV, USA, Proceedings. pages 182-187, IEEE, 2010. [doi]

Abstract

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