Hardware-efficient propagate partial sad architecture for variable block size motion estimation in H.264/AVC - researchr publication authors

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Zhenyu Liu, Yiqing Huang, Yang Song, Satoshi Goto, Takeshi Ikenaga. Hardware-efficient propagate partial sad architecture for variable block size motion estimation in H.264/AVC. In Hai Zhou, Enrico Macii, Zhiyuan Yan, Yehia Massoud, editors, Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007. pages 160-163, ACM, 2007. [doi]

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