A 100V gate driver with sub-nanosecond-delay capacitive-coupled level shifting and dynamic timing control for ZVS-based synchronous power converters

Zhidong Liu, Hoi Lee. A 100V gate driver with sub-nanosecond-delay capacitive-coupled level shifting and dynamic timing control for ZVS-based synchronous power converters. In Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, San Jose, CA, USA, September 22-25, 2013. pages 1-4, IEEE, 2013. [doi]

Abstract

Abstract is missing.