Minimal complexity low-latency architectures for Viterbi decoders

Renfei Liu, Keshab K. Parhi. Minimal complexity low-latency architectures for Viterbi decoders. In Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2008, Proceedings, October 8-10, 2008, Washington, D.C. Metro Area, USA. pages 140-145, IEEE, 2008. [doi]

Abstract

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