Assertion Coverage Aware Trace Signal Selection in Post-Silicon Validation

Xiaobang Liu, Ranga Vemuri. Assertion Coverage Aware Trace Signal Selection in Post-Silicon Validation. In 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019. pages 271-277, IEEE, 2019. [doi]

@inproceedings{LiuV19-0,
  title = {Assertion Coverage Aware Trace Signal Selection in Post-Silicon Validation},
  author = {Xiaobang Liu and Ranga Vemuri},
  year = {2019},
  doi = {10.1109/ISQED.2019.8697793},
  url = {https://doi.org/10.1109/ISQED.2019.8697793},
  researchr = {https://researchr.org/publication/LiuV19-0},
  cites = {0},
  citedby = {0},
  pages = {271-277},
  booktitle = {20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019},
  publisher = {IEEE},
  isbn = {978-1-7281-0392-1},
}