A Fast and Efficient FPGA-based Level Set Hardware Accelerator for Image Segmentation - researchr publication authors

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Ye Liu, Yin Wang, Liang Chang 0002, Jun Zhou 0017. A Fast and Efficient FPGA-based Level Set Hardware Accelerator for Image Segmentation. In 2020 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2020, Nanjing, China, November 23-25, 2020. pages 61-62, IEEE, 2020. [doi]

This author has not been identified. Look up 'Ye Liu' in GoogleThis author has not been identified. Look up 'Yin Wang' in GoogleThis author has not been identified. Look up 'Liang Chang 0002' in GoogleThis author has not been identified. Look up 'Jun Zhou 0017' in Google

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