Andreas Löfwenmark, Simin Nadjm-Tehrani. Understanding Shared Memory Bank Access Interference in Multi-Core Avionics. In Martin Schoeberl, editor, 16th International Workshop on Worst-Case Execution Time Analysis, WCET 2016, July 5, 2016, Toulouse, France. Volume 55 of OASICS, Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, 2016. [doi]
Abstract is missing.