Lukasz Lopacinski, Alireza Hasani, Goran Panic, Nebojsa Maletic, Jesús Gutiérrez 0004, Milos Krstic, Eckhard Grass, Rolf Kraemer. A Hardware Optimized High Throughput LDPC Decoder Supporting 3 Tb/s in 28 nm CMOS. In 2022 IEEE 33rd Annual International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC), Kyoto, Japan, September 12-15, 2022. pages 1326-1331, IEEE, 2022. [doi]
@inproceedings{LopacinskiHPM0K22,
title = {A Hardware Optimized High Throughput LDPC Decoder Supporting 3 Tb/s in 28 nm CMOS},
author = {Lukasz Lopacinski and Alireza Hasani and Goran Panic and Nebojsa Maletic and Jesús Gutiérrez 0004 and Milos Krstic and Eckhard Grass and Rolf Kraemer},
year = {2022},
doi = {10.1109/PIMRC54779.2022.9978104},
url = {https://doi.org/10.1109/PIMRC54779.2022.9978104},
researchr = {https://researchr.org/publication/LopacinskiHPM0K22},
cites = {0},
citedby = {0},
pages = {1326-1331},
booktitle = {2022 IEEE 33rd Annual International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC), Kyoto, Japan, September 12-15, 2022},
publisher = {IEEE},
isbn = {978-1-6654-8053-6},
}