Sonia López, Steve Dropsho, David H. Albonesi, Oscar Garnica, Juan Lanchares. Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches. In Koen De Bosschere, David R. Kaeli, Per Stenström, David B. Whalley, Theo Ungerer, editors, High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings. Volume 4367 of Lecture Notes in Computer Science, pages 136-150, Springer, 2007. [doi]
Abstract is missing.