Adaptive Cache Memories for SMT Processors

Sonia López, Oscar Garnica, David H. Albonesi, Steven G. Dropsho, Juan Lanchares, José Ignacio Hidalgo. Adaptive Cache Memories for SMT Processors. In Sebastián López, editor, 13th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2010, 1-3 September 2010, Lille, France. pages 331-338, IEEE, 2010. [doi]

@inproceedings{LopezGADLH10,
  title = {Adaptive Cache Memories for SMT Processors},
  author = {Sonia López and Oscar Garnica and David H. Albonesi and Steven G. Dropsho and Juan Lanchares and José Ignacio Hidalgo},
  year = {2010},
  doi = {10.1109/DSD.2010.69},
  url = {http://dx.doi.org/10.1109/DSD.2010.69},
  tags = {caching},
  researchr = {https://researchr.org/publication/LopezGADLH10},
  cites = {0},
  citedby = {0},
  pages = {331-338},
  booktitle = {13th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2010, 1-3 September 2010, Lille, France},
  editor = {Sebastián López},
  publisher = {IEEE},
  isbn = {978-0-7695-4171-6},
}