Layout-aware sizing of analog ICs using floorplan & routing estimates for parasitic extraction

Nuno C. Lourenço, Ricardo Martins, Nuno Horta. Layout-aware sizing of analog ICs using floorplan & routing estimates for parasitic extraction. In Wolfgang Nebel, David Atienza, editors, Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, DATE 2015, Grenoble, France, March 9-13, 2015. pages 1156-1161, ACM, 2015. [doi]

Abstract

Abstract is missing.