A testable and debuggable dual-core system with thermal-aware dynamic voltage and frequency scaling

Liang-Ying Lu, Ching-Yao Chang, Zhao-Hong Chen, Bo-Ting Yeh, Tai-Hua Lu, Peng-Yu Chen, Pin-Hao Tang, Kuen-Jong Lee, Lih-Yih Chiou, Soon-Jyh Chang, Chien-Hung Tsai, Chung-Ho Chen, Jai-Ming Lin. A testable and debuggable dual-core system with thermal-aware dynamic voltage and frequency scaling. In 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016, Macao, Macao, January 25-28, 2016. pages 17-18, IEEE, 2016. [doi]

Authors

Liang-Ying Lu

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Ching-Yao Chang

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Zhao-Hong Chen

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Bo-Ting Yeh

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Tai-Hua Lu

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Peng-Yu Chen

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Pin-Hao Tang

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Kuen-Jong Lee

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Lih-Yih Chiou

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Soon-Jyh Chang

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Chien-Hung Tsai

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Chung-Ho Chen

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Jai-Ming Lin

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