A 3.0 Gb/s Throughput Hardware-Efficient Decoder for Cyclically-Coupled QC-LDPC Codes

Qing Lu, Jianfeng Fan, Chiu-Wing Sham, Wai Man Tam, Francis C. M. Lau. A 3.0 Gb/s Throughput Hardware-Efficient Decoder for Cyclically-Coupled QC-LDPC Codes. IEEE Trans. on Circuits and Systems, 63-I(1):134-145, 2016. [doi]

@article{LuFSTL16,
  title = {A 3.0 Gb/s Throughput Hardware-Efficient Decoder for Cyclically-Coupled QC-LDPC Codes},
  author = {Qing Lu and Jianfeng Fan and Chiu-Wing Sham and Wai Man Tam and Francis C. M. Lau},
  year = {2016},
  doi = {10.1109/TCSI.2015.2510619},
  url = {http://dx.doi.org/10.1109/TCSI.2015.2510619},
  researchr = {https://researchr.org/publication/LuFSTL16},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on Circuits and Systems},
  volume = {63-I},
  number = {1},
  pages = {134-145},
}