A 10-bit 60-MS/s Low-Power CMOS Pipelined Analog-to-Digital Converter

Chi-Chang Lu, Tsung-Sum Lee. A 10-bit 60-MS/s Low-Power CMOS Pipelined Analog-to-Digital Converter. IEEE Trans. on Circuits and Systems, 54-II(8):658-662, 2007. [doi]

Abstract

Abstract is missing.